Yield Modeling of a WSI Telecom Router Architecture

This paper presents a closed form yield model that takes into account constraints of an architecture. It applies to architectures that approximate global redundancy and for which the constraints translate into yield losses. The impact of the constraints on yield was evaluated by calculating the probability of observing non-tolerable defect patterns and by subtracting these probabilities from yield of arrays with global redundancy. It is shown that most of the yield losses come from a few patterns comprising small number of defects. A relatively sharp threshold in the yield to defect density relationship is observed. This paper also proposes a regression yield model. Using a simple regression analysis, a simplified model accurately predicts the slope and pivot point of true yield curves. These models can be used to predict when more redundancy is needed for given array and cells sizes.